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Key people at LogicVision Inc..
LogicVision Inc. was founded in 1992 by Rajeev Madhavan (Co-Founder, Director of Engineering).
LogicVision Inc. specializes in electronic design automation (EDA), providing Design for Test (DFT) solutions. The company offers proprietary embedded test and yield learning technologies, enabling efficient manufacturing of complex integrated circuits. Its tools deliver built-in self-test (BIST) capabilities across digital, analog, and mixed-signal designs, addressing chip and system-level verification.
Founded in 1992 by Rajeev Madhavan and Dr. Vinod K. Agarwal, LogicVision emerged from the complexity of semiconductor design. Recognizing a critical need for efficient, integrated testing, they established the company to develop advanced built-in test solutions. Initially known as LV Software, the company rebranded to LogicVision in 1996.
LogicVision's products serve the semiconductor industry, primarily ASIC designers and chip fabrication firms. Its vision centers on enhancing production reliability and cost-effectiveness via streamlined testing processes. The company aims to facilitate development and manufacturing of intricate electronic components with improved quality and faster market entry.
LogicVision Inc. was founded in 1992 by Rajeev Madhavan (Co-Founder, Director of Engineering).
Key people at LogicVision Inc..
LogicVision, Inc. was a US-based electronic design automation (EDA) company specializing in chip, board, and system-level Design for Test (DFT) solutions for ASIC vendors, enabling embedded test, Built-In Self-Test (BIST), and yield learning tools applicable to digital, analog, and mixed-signal semiconductor designs.[1][2][4] It served semiconductor designers and manufacturers by embedding test functionality into chips to reduce production test costs, accelerate silicon bring-up, shorten time-to-market and time-to-yield, and minimize field returns.[1][3] Founded in 1992 and publicly traded as LGVN on NASDAQ from 2001, the company never achieved profitability and was acquired by Mentor Graphics in 2009 for $13 million in an all-stock deal, after which its technologies were integrated into Mentor's business unit.[1][4]
LogicVision was founded in 1992 as LV Software by Vinod Agarwal, a former McGill University professor of electrical engineering, and initially co-attributed to Rajeev Madhavan in some records; it was renamed LogicVision later that year and headquartered in San Jose, California.[1][4] The idea emerged from Agarwal's expertise in electrical engineering, focusing on DFT innovations for complex semiconductors amid growing chip complexity in the 1990s. It went public in October 2001, acquired SiVerion in November 2004 for yield analysis capabilities, and saw Agarwal resign as chairman in 2005. Early traction included developing tool suites like ETCreate for test IP insertion, but persistent unprofitability led to the 2009 acquisition by Mentor Graphics, marking the end of its independent operations.[1]
LogicVision stood out in the EDA space through specialized tools and approaches:
LogicVision rode the 1990s-2000s surge in semiconductor complexity, driven by shrinking process nodes and rising ASIC adoption in computing, telecom, and consumer electronics, where traditional test methods became cost-prohibitive.[1][4] Its timing aligned with the EDA market's shift toward embedded DFT and BIST to handle multi-million-gate designs, influencing yield optimization amid foundry pressures. Market forces like Moore's Law acceleration and outsourcing to fabs favored its tools, helping vendors like those using TSMC or similar cut test escapes. Post-acquisition, its tech bolstered Mentor Graphics' (now Siemens EDA) portfolio, contributing to industry standards in testable silicon design and indirectly shaping modern SoC validation ecosystems.[1]
Acquired in 2009 and fully integrated into Mentor Graphics, LogicVision as an independent entity ceased operations, with its DFT innovations persisting within Siemens EDA's offerings amid ongoing advances in AI-driven chip design and 3D-IC testing.[1] Future trends like sub-2nm nodes and heterogeneous integration will amplify demand for evolved embedded test tech, potentially expanding its legacy influence. Its story underscores the EDA consolidation wave, where specialized players fuel larger incumbents riding semiconductor megatrends.